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path: root/sys/arch/mips/include
AgeCommit message (Expand)Author
2003-03-02add some ISO C 1995 I18N functions and types:tshiozak
2003-02-17No need to protect headers with #ifdef _KERNEL if they're never installedsimonb
2003-02-07Update to consistently use Broadcom GPL-compatible license on all SiByte code.cgd
2003-02-05Replace machine/rnd.h with more appropriate name to share itnakayama
2003-01-28Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it.kent
2003-01-22LWP'ify the svr4_mcontext stuff.rafal
2003-01-20Fix typo in sigcontext conversion macros. From Christopher SEKIYA.thorpej
2003-01-18Add '#define' for _MCONTEXT_TO_SIGCONTEXT().tsutsui
2003-01-17Merge the nathanw_sa branch.thorpej
2003-01-10Add the MIPS3_CONFIG_SE (name taken from Rm52xx manual) bit, which is therafal
2002-12-17Add support for caches where the data cache is fully coherent, andsimonb
2002-12-10Rename __LDPGSZ to AOUT_LDPGSZ, to accurately reflect what it is.thorpej
2002-12-10Use __LDPGSZ (which must be == USRTEXT) as the text address for a.outthorpej
2002-12-05Drop the _KERNEL test; these functions are needed for SMP and other portssimonb
2002-11-30Fix botch in previous. This is pcb.h, not reg.h.tsutsui
2002-11-30Standardise on #ifdef _MIPS_<header>_H_ for multiple inclusion tests.simonb
2002-11-30Add multiple-inclusion protection.simonb
2002-11-26Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.lukem
2002-11-24New generic way-aware MIPS32/64 range-index cache functions with propersimonb
2002-11-24Add the VI bit in config 0.simonb
2002-11-24Move the curpcb and segbase extern decls to cpu.h to better group togethersimonb
2002-11-17Add cache_r4k_op_8lines_{16,32} macros to perform cache ops on 8simonb
2002-11-15Define COP0_HAZARD_FPUENABLE as four nops.simonb
2002-11-15Declare some CP0 hazards for the SB1 core.simonb
2002-11-15White space nits.simonb
2002-11-09Make md_ss_addr a vaddr_t.thorpej
2002-11-09Make cache size/mask variables unsigned.thorpej
2002-11-04Use named indices for RA, SR, MULLO, MULHI, and EPC in thethorpej
2002-11-04Define named constants for the trapframe register idices (theythorpej
2002-11-04Add TA0-TA3 register indices.thorpej
2002-11-04Add SGI-compatible ta0-ta3 register names. These allow one to writethorpej
2002-11-03Add LP64 limits.thorpej
2002-11-03Add LP64 types, limits, formats.thorpej
2002-11-03Add LP64 macros.thorpej
2002-11-03Add LP64 types.thorpej
2002-11-03Add _LP64 types.thorpej
2002-11-03In the _MIPS_PADDR_T_64BIT case, only use "unsigned long long" if _LP64thorpej
2002-11-03Retire __HAVE_MD_RUNQUEUE from MD types.h and removenisimura
2002-11-03Add two PRiD values.nisimura
2002-11-02Make register_t == long long for N32, and == long for everthing else.thorpej
2002-11-02Define N32/N64 register usage.thorpej
2002-10-14eliminate PT_ENTRY_NULL in favor of plain old NULL.chs
2002-09-22Use "#define\t" instead of "#define ".simonb
2002-09-22it really helps to get the stub right before cutting + pasting it 27 times.chs
2002-09-22add pmap_remove_all() hook (empty on most platforms so far).chs
2002-09-22Add __HAVE_MD_RUNQUEUE flag for MD code to override MI run queue primitives.gmcgarry
2002-09-16Bring down from nathanw_sa branch.gmcgarry
2002-08-28RAS support for MIPS. Tested on R3000.gmcgarry
2002-08-28Add the Toshiba TX4927 CPU.simonb
2002-08-07Implement pmc(9) -- An interface to hardware performance monitoringbriggs