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2020-07-30Sort the #define __HAVEs. NFCI.skrll
2020-07-29Add definitions for the CP0 WatchLo/WatchHi registers.simonb
2020-07-27s/MODULE/_MODULE/skrll
2020-07-27Fix typo _MODULAR -> _MODULE. Hopefully this fixes the builds.skrll
2020-07-26#define<tab>simonb
2020-07-26Add CP0 Config Registers 6 and 7.simonb
2020-07-26Remove mostly duplicate MIPS spec CP0 regs from octeon_corereg.h, movesimonb
2020-07-26Add a space in a comment.simonb
2020-07-23unifdef -U_LKMskrll
2020-07-23Trailing whitespaceskrll
2020-07-23Add a comment to CACHE_LINE_SIZE / COHERENCY_UNIT size definesskrll
2020-07-23On second thoughts this can't be conditional so define CACHE_LINE_SIZE /skrll
2020-07-23Define CACHE_LINE_SIZE / COHERENCY_UNIT as 128 for MIPS64_OCTEONskrll
2020-07-20Expose the width of the MIPS_EBASE_CPUNUM bitfield for asm code.simonb
2020-07-20Add an extra bitfield in MIPS_COP_0_EBASE.simonb
2020-07-13Remove a magic number.simonb
2020-07-13Copy "mach reset" logic from arm32 recently added by jmcneill@. Thesimonb
2020-06-14Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139tsutsui
2020-06-14Define Octeon Cavium cache layouts for various cnMIPS cores.simonb
2020-06-14Retire MIPS_CP0FL_USERLOCAL and MIPS_CP0FL_HWRENA and the flawedsimonb
2020-06-13Move MIPSNN_CFG3_ULRI so that it doesn't appear in some random positionsimonb
2020-06-13Use the correct config3 field name (ULRI) for UserLocal register issimonb
2020-06-13Note some hard-coded capabilties that can be probed.simonb
2020-05-24Add mipsNN_cp0_rdhwr_cpunum() which returns the current CPU numbersimonb
2020-05-23Add CX73xx and CXF75xx Cavium Octeon PRIDs.simonb
2020-05-07Add PRID definition for newer SiByte SB1 cores (rev 0x11).simonb
2020-04-30G/C __HAVE_AST_PERPROCskrll
2020-04-17Mark the .ident section as mergable string section to avoid redundantjoerg
2020-03-22Temporarily mark hppa, mips, powerpc and riscv with __HAVE_UNLOCKED_PMAP,ad
2019-12-01Fix false sharing problems with cpu_info. Identified with tprof(8).ad
2019-11-29Nix now-unused definitions of MUTEX_GIVE/MUTEX_RECEIVE.riastradh
2019-11-29Largely eliminate the MD rwlock.h header file.riastradh
2019-11-21mi_userret(): take care of calling preempt(), set spc_curpriority directly,ad
2019-10-29do the pragma dance to avoid -Wshadowchristos
2019-06-19Whitespace and whitespace consistencyskrll
2019-06-18Introduce PTRACE_REG_FP() a helper macro to retrieve the frame pointerkamil
2019-05-11#define<tab> for consistencyskrll
2019-05-07Switch all users (except ia64) of custom machine/ansi.h to common_ansi.hkamil
2019-05-05PR/54133: Sevan Janiyan: Binaries fail to executechristos
2019-04-11Fix tyop.simonb
2019-04-06Overhaul the API used to fetch and store individual memory cells inthorpej
2019-04-01s/adddress/address/msaitoh
2019-02-07add missing BUS_DMA_PREFETCHABLEmrg
2019-01-21Fix wrong scoping of {U,}LLONG_MAX. More cases, not just amd64.dholland
2018-12-19Remove compat_svr4 and compat_svr4_32, as discussed on tech-kern@ recently,maxv
2018-09-16interrupt has two 'r'sskrll
2018-09-04mark STATIC_NESTED_NOPROFILE() functions as functions.mrg
2018-08-22- Cleanup for dynamic sysctl:msaitoh
2018-07-12Remove the kernel PMC code. Sent yesterday on tech-kern@.maxv
2018-05-31it's called VM_MAXUSER_ADDRESS32 not VM_MAXUSER32_ADDRESS.mrg