| Age | Commit message (Expand) | Author |
| 2020-07-30 | Sort the #define __HAVEs. NFCI. | skrll |
| 2020-07-29 | Add definitions for the CP0 WatchLo/WatchHi registers. | simonb |
| 2020-07-27 | s/MODULE/_MODULE/ | skrll |
| 2020-07-27 | Fix typo _MODULAR -> _MODULE. Hopefully this fixes the builds. | skrll |
| 2020-07-26 | #define<tab> | simonb |
| 2020-07-26 | Add CP0 Config Registers 6 and 7. | simonb |
| 2020-07-26 | Remove mostly duplicate MIPS spec CP0 regs from octeon_corereg.h, move | simonb |
| 2020-07-26 | Add a space in a comment. | simonb |
| 2020-07-23 | unifdef -U_LKM | skrll |
| 2020-07-23 | Trailing whitespace | skrll |
| 2020-07-23 | Add a comment to CACHE_LINE_SIZE / COHERENCY_UNIT size defines | skrll |
| 2020-07-23 | On second thoughts this can't be conditional so define CACHE_LINE_SIZE / | skrll |
| 2020-07-23 | Define CACHE_LINE_SIZE / COHERENCY_UNIT as 128 for MIPS64_OCTEON | skrll |
| 2020-07-20 | Expose the width of the MIPS_EBASE_CPUNUM bitfield for asm code. | simonb |
| 2020-07-20 | Add an extra bitfield in MIPS_COP_0_EBASE. | simonb |
| 2020-07-13 | Remove a magic number. | simonb |
| 2020-07-13 | Copy "mach reset" logic from arm32 recently added by jmcneill@. The | simonb |
| 2020-06-14 | Use proper "page" alignments for R5k Page Invalidate(S) op. PR/55139 | tsutsui |
| 2020-06-14 | Define Octeon Cavium cache layouts for various cnMIPS cores. | simonb |
| 2020-06-14 | Retire MIPS_CP0FL_USERLOCAL and MIPS_CP0FL_HWRENA and the flawed | simonb |
| 2020-06-13 | Move MIPSNN_CFG3_ULRI so that it doesn't appear in some random position | simonb |
| 2020-06-13 | Use the correct config3 field name (ULRI) for UserLocal register is | simonb |
| 2020-06-13 | Note some hard-coded capabilties that can be probed. | simonb |
| 2020-05-24 | Add mipsNN_cp0_rdhwr_cpunum() which returns the current CPU number | simonb |
| 2020-05-23 | Add CX73xx and CXF75xx Cavium Octeon PRIDs. | simonb |
| 2020-05-07 | Add PRID definition for newer SiByte SB1 cores (rev 0x11). | simonb |
| 2020-04-30 | G/C __HAVE_AST_PERPROC | skrll |
| 2020-04-17 | Mark the .ident section as mergable string section to avoid redundant | joerg |
| 2020-03-22 | Temporarily mark hppa, mips, powerpc and riscv with __HAVE_UNLOCKED_PMAP, | ad |
| 2019-12-01 | Fix false sharing problems with cpu_info. Identified with tprof(8). | ad |
| 2019-11-29 | Nix now-unused definitions of MUTEX_GIVE/MUTEX_RECEIVE. | riastradh |
| 2019-11-29 | Largely eliminate the MD rwlock.h header file. | riastradh |
| 2019-11-21 | mi_userret(): take care of calling preempt(), set spc_curpriority directly, | ad |
| 2019-10-29 | do the pragma dance to avoid -Wshadow | christos |
| 2019-06-19 | Whitespace and whitespace consistency | skrll |
| 2019-06-18 | Introduce PTRACE_REG_FP() a helper macro to retrieve the frame pointer | kamil |
| 2019-05-11 | #define<tab> for consistency | skrll |
| 2019-05-07 | Switch all users (except ia64) of custom machine/ansi.h to common_ansi.h | kamil |
| 2019-05-05 | PR/54133: Sevan Janiyan: Binaries fail to execute | christos |
| 2019-04-11 | Fix tyop. | simonb |
| 2019-04-06 | Overhaul the API used to fetch and store individual memory cells in | thorpej |
| 2019-04-01 | s/adddress/address/ | msaitoh |
| 2019-02-07 | add missing BUS_DMA_PREFETCHABLE | mrg |
| 2019-01-21 | Fix wrong scoping of {U,}LLONG_MAX. More cases, not just amd64. | dholland |
| 2018-12-19 | Remove compat_svr4 and compat_svr4_32, as discussed on tech-kern@ recently, | maxv |
| 2018-09-16 | interrupt has two 'r's | skrll |
| 2018-09-04 | mark STATIC_NESTED_NOPROFILE() functions as functions. | mrg |
| 2018-08-22 | - Cleanup for dynamic sysctl: | msaitoh |
| 2018-07-12 | Remove the kernel PMC code. Sent yesterday on tech-kern@. | maxv |
| 2018-05-31 | it's called VM_MAXUSER_ADDRESS32 not VM_MAXUSER32_ADDRESS. | mrg |