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path: root/sys/arch/x86/include
AgeCommit message (Expand)Author
2021-12-12s/Miscellanous/Miscellaneous/ in copypasta comments.andvar
2021-12-09Print TLB message consistently to improve readability.msaitoh
2021-10-28x86: Process bootloader rndseed much sooner.riastradh
2021-10-07Move some common functions into x86/identcpu_subr.c. No functional change.msaitoh
2021-09-30Print CPUID_PBE (Pending Break Enable) with "PBE".msaitoh
2021-09-27Add Load Only TLB and Store Only TLB.msaitoh
2021-08-14Improved the performance of kernel profiling on MULTIPROCESSOR, and possible ...ryo
2021-07-21Separate MI smbios interface from MD specific code.jmcneill
2021-07-10Add some definitions from Intel SDM:msaitoh
2021-04-30merge the i386 and amd64 gdt.h files.christos
2021-04-30Merge the x86 gdt function and constant definitionschristos
2021-04-30Bump MAX_USERLDT_SIZE to the max size (wastes some memory). wine needs morechristos
2021-03-18LIR_HV priority should be lower than softint.nonaka
2021-02-19Identify VirtualBox as a separate guest type.christos
2021-01-28Remove x86_genfb_mtrr_init. PATs have been available since the Pentium IIIjmcneill
2021-01-21PRIxXXXX (etc) definitions should not include the %kre
2020-11-24Add some definitions from the latest Intel SDM:msaitoh
2020-11-15remove unused x86_cpu_initclock_func()bouyer
2020-10-24Issue 64-bit versions of *XSAVE* for 64-bit amd64 programsmgorny
2020-10-15Revert "Merge convert_xmm_s87.c into fpu.c"mgorny
2020-09-07Fix printb string for LA57jakllsch
2020-09-07 Add CPUID(EAX=07H, ECX=0) ECX bit 16 LA57 from maxv.msaitoh
2020-09-05x86: fix several CPUID flagsmaxv
2020-09-05x86: rename PGEX_X -> PGEX_Imaxv
2020-09-04Add a few more CPUID flags.maxv
2020-08-08PR/55547: Dan Plassche: Fix BSD/OS binary emulation.christos
2020-08-05Add new fields here and there.maxv
2020-08-01move __HAVE_PCI_MSI_MSIX to <x86/pci_machdep_common.h>jdolecek
2020-07-20Revert previous, to unbreak the build (NVMM declares the macro too).maxv
2020-07-19add definition for MSR_IA32_FEATURE_CONTROL, just for informationjdolecek
2020-07-19don't include opt_user_ldt.h when it is not neededmaxv
2020-07-19Revert most of ad's movs/stos change. Instead do a lot simpler: declaremaxv
2020-07-14Introduce per-cpu IDTsyamaguchi
2020-06-29padlock(4): Remove legacy rijndael API use.riastradh
2020-06-24remove unused x86_stosmaxv
2020-06-19localifymaxv
2020-06-18style and fix typomaxv
2020-06-15Serialize rdtsc using with lfence, mfence or cpuid to read TSC more precisely.msaitoh
2020-06-14Use static constant rather than stack memset buffer for zero fpregs.riastradh
2020-06-10 Add SRBDS_CTRL bit.msaitoh
2020-06-01Add some definitions from the latest Intel SDM plus small fix:msaitoh
2020-05-28Add AMD MSR_DE_CFG's bit 1 as DE_CFG_LFENCE_SERIALIZE.msaitoh
2020-05-27- Add a couple of wrapper functions around STOS and MOVS and use them to zeroad
2020-05-26Ajust pmap_enter_ma() for upcoming new Xen privcmd ioctl:bouyer
2020-05-21- Recalibrate the APIC timer using the TSC, once the TSC has in turn beenad
2020-05-10Reintroduce cpu_rng_early_sample(), but this time with embedded detectionmaxv
2020-05-08Fix the TSC timecounter (on the systems I have access to):ad
2020-05-08Factor randomization out of slotspace_rand.riastradh
2020-05-02Introduce Xen PVH support in GENERIC.bouyer
2020-05-02Modify the hotpatch mechanism, in order to make it much less ROP-friendly.maxv