| Age | Commit message (Expand) | Author |
| 2023-05-11 | Add some new event counters. | msaitoh |
| 2023-05-11 | Some statistics registers were replaced with new counters. | msaitoh |
| 2022-10-19 | Fix typo. No functional change. OK'd by knakahara. | msaitoh |
| 2022-07-22 | Add more statistics countes. | msaitoh |
| 2022-07-20 | Modify comment. Use __BIT() a little. No functional change. | msaitoh |
| 2021-12-22 | Fixup NQTXC_CMD_{TCP,UDP} after previous | skrll |
| 2021-12-22 | In a close run thing use #define<tab> everywhere for consistency | skrll |
| 2021-12-22 | Use __BIT() some more. Same code before and after. | skrll |
| 2021-12-20 | Trailing whitespace | skrll |
| 2021-11-05 | Fix comment. No functional change. | msaitoh |
| 2020-09-16 | Add a workaround for jumbo frame on PCH2 and newer. Tested by chs@. | msaitoh |
| 2020-01-08 | - Fix SFF_SFP_ETH_FLAGS_100FX. It's not 0x10 but 0x20. | msaitoh |
| 2019-12-11 | Add SFP support part 1. The code for SerDes and SGMII setting is not include | msaitoh |
| 2019-12-11 | - Set CTRL_ILOS(Invert loss of signal) bit correctly on 82580 port 1, 2, 3 and | msaitoh |
| 2019-12-11 | No functional change: | msaitoh |
| 2019-07-23 | Define RETA_ENTRY_MASK_Q(used in RSS redirection table) correctly. | msaitoh |
| 2019-06-07 | Use unsigned. Found by UBSan. OK'd by kamil. | msaitoh |
| 2019-02-28 | Typo (s/vaule/value/) | khorben |
| 2019-01-31 | Add some workarounds which use EMI register or EEE related: | msaitoh |
| 2018-12-20 | - Don't setup WoL on non-WoL capable port. | msaitoh |
| 2018-12-14 | - Fix availability detection of WoL on some chips. This change has no effect | msaitoh |
| 2018-11-19 | - Control TX/RX descriptor snooping control bits on ICH8 and newer. | msaitoh |
| 2018-11-02 | Add workaround for DMA hang problem which result in TX device timeout on | msaitoh |
| 2018-04-12 | No binary change: | msaitoh |
| 2018-04-10 | SW PHY Config Enable bit for ICH8 B0 stepping is not bit 1 but bit 0. | msaitoh |
| 2017-11-22 | Revert if_wmreg.h 1.104 and if_wm.c 1.542. It's not required to mask other | msaitoh |
| 2017-10-23 | fix wm(4) vlan panic. Reported and tested by Tom Ivar Helbekkmo, thanks. | knakahara |
| 2017-07-26 | - Our MII readreg/writereg API has not way to detect an error. | msaitoh |
| 2017-07-13 | - Call wm_kmrn_lock_loss_workaround_ich8lan() before any PHY access in | msaitoh |
| 2017-07-12 | Disable D0 LPLU on 8257[12356], 82580, I350 and I21[01], too. Before this co... | msaitoh |
| 2017-06-26 | - Make new wm_phy_post_reset() and use this function at all location after | msaitoh |
| 2017-06-26 | - Fix wm_set_ral(): | msaitoh |
| 2017-02-28 | fix EITR setting. | knakahara |
| 2017-02-02 | Fix typo in comment. | msaitoh |
| 2017-02-01 | tabify | knakahara |
| 2017-01-16 | support {extended, advanced} receive descriptor for wm(4). | knakahara |
| 2016-12-13 | - Change to use 2500Base-KX correctly on C2000(I354). It worked, but the | msaitoh |
| 2016-11-16 | Sync wm_smbustopci() with Linux and FreeBSD. This change effects PCH and | msaitoh |
| 2016-11-16 | Add three workarounds for PCH_{LPT,SPT}. | msaitoh |
| 2016-11-14 | Sort registers. No functional change. | msaitoh |
| 2016-11-11 | The MEHE bit in the CTRL register is not bit 17 but 19. | msaitoh |
| 2016-05-06 | Basic support for I219. It doesn't work on I219, so it's disabled. | msaitoh |
| 2015-12-25 | - Fix RAL table's size of PCH2 and PCH_LPT. | msaitoh |
| 2015-10-27 | Move the definition of CTRL_EXT_PHYPDEN and use __BIT(). No binary change. | msaitoh |
| 2015-10-23 | PHY_CTRL_GBE_DIS is not bit 4 but bit 6. This change has no any effect by | msaitoh |
| 2015-10-13 | fix RXCSUM_CRCOFL bit of WMREG_RXCSUM register. | knakahara |
| 2015-10-13 | support RX multiqueue. | knakahara |
| 2015-10-13 | change const value register macros to macro expressions to support multiqueue. | knakahara |
| 2015-10-08 | - ACK Accelerate Disable in the RFCTL register is not bit 13 but 12. | msaitoh |
| 2015-09-30 | fix IVARs offset for 82580 and newer. | knakahara |