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pci_subr.c
Age
Commit message (
Expand
)
Author
2022-02-01
Fix typo. Found by rillig. s/vendor specific/vendor-specific/
msaitoh
2022-01-31
Decode SCSI programming interface. Whitespace fix.
msaitoh
2022-01-31
Add three new extended capabilities:
msaitoh
2022-01-08
place additional parens around multiline string constant to appease clang
tnn
2022-01-07
Two fixes:
msaitoh
2022-01-07
Add missing comma. Found by tnn@.
msaitoh
2022-01-01
Print Physical Layer 16.0 GT/s and Lane Margining at the Receiver extended cap.
msaitoh
2021-12-28
%hhx -> %x
msaitoh
2021-12-28
Decode link control2's Compliance Preset/De-emphasis more. Fix typo.
msaitoh
2021-12-03
fix various typos in comments, log messages and documentation.
andvar
2021-10-10
Use PCI-SIG official acronyms:
msaitoh
2021-10-10
Add Some PCI config information:
msaitoh
2021-09-11
add 32.0GT/s to the list of pcie speeds (PCIe 5.x.)
mrg
2021-08-17
fix multiplei repetitive typos in comments, messages and documentation. mainl...
andvar
2021-08-17
s/Windw/Window/ in log message.
andvar
2021-07-12
s/Precision Time Management/Precision Time Measurement/
msaitoh
2021-06-29
Rework the xxxVERBOSE option to share the common module-hook-based
pgoyette
2021-01-27
Introduce autoconfiguration helpers based around device_compatible_entry:
thorpej
2020-05-30
change pci_conf_print() to allocate memory for the regs dynamically
jdolecek
2020-04-10
Fix all the random __SHIFTOUT casts by introducing an intermediate macho,
christos
2020-03-21
When parsing Enhanced Allocation entries, use the correct calulation for
thorpej
2020-01-25
Add PCIe 4.0 stuff a little:
msaitoh
2020-01-25
- Print Bridge Config Retry Enable bit and Retimer Presence Detect Supported
msaitoh
2020-01-17
Fix a bug that the virtual channel extended configuraton's arbitration phase
msaitoh
2019-12-11
s/enalbe/enable/
msaitoh
2019-09-20
Print some DPC register values not with %04x but with %08x because those
msaitoh
2019-08-21
Whitespace fixes. No functional change.
msaitoh
2019-07-18
Remove whitespace for consistency.
msaitoh
2019-07-09
Print extend capability from 0x25 to 0x29 correctly.
msaitoh
2019-07-09
Identify 16GT/s.
msaitoh
2019-03-01
- Almost all ppbreg.h's definitions are also in pcireg.h. Remove duplicated
msaitoh
2019-02-28
Typo (s/vaule/value/)
khorben
2018-11-30
Add new PCIE_HAS_LINKREGS(pcie_devtype) and use it. No functional change.
msaitoh
2018-11-30
Add new macro PCIE_HAS_ROOTREGS(pcie_devtype) and use it. No functional
msaitoh
2018-11-30
The downstream port of PCIe switch is not a root port, so don't print
msaitoh
2018-11-05
Decode PCI Enhanced Allocation.
msaitoh
2018-10-04
Don't print extra newline if the PCI extended configuration space doesn't ex...
msaitoh
2018-10-03
- Don't print TPH requester's ST Table Size if the ST table location field
msaitoh
2018-09-27
Root Complex Event Collector Bus Number Association ECN.
msaitoh
2018-09-12
Add ATS Relaxed Ordering supported bit described in Address Translation
msaitoh
2018-07-03
- Print Power Management Control/status register in 32bit.
msaitoh
2018-05-09
Fix typo. s/TPL/TLP/
msaitoh
2018-02-01
- Add PCie Link Activation ECN.
msaitoh
2018-02-01
Cleanup:
msaitoh
2018-02-01
"s/above 300W/greater than 300W/" in pci_conf_print_pcie_power(). From
msaitoh
2017-12-18
Add VGA 16bit decode bit into the PCI bridge control register. This bit is
msaitoh
2017-10-25
Whitespace fix.
msaitoh
2017-10-24
Print Error Source Identification register correctly.
msaitoh
2017-10-19
Fix a bug that the TPH ST table is decoded even if it's not in the TPH
msaitoh
2017-10-12
IOMMU cap dump fixes:
msaitoh
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