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2022-06-27Fix editing mishap, should fix the buildmartin
2022-06-26Teach the LLVM-derived unwinder about the DWARF pseudo-registers definedskrll
by GCC for HPPA to hold the return address where the signal trampoline will resume. XXX Same treatment is needed for HPPA64, but not done as part of this commit. Thanks to thorpej for help with this. (ages ago)
2021-11-24Teach the LLVM-derived unwinder about the DWARF pseudo-registers definedthorpej
by GCC for SuperH for GBR, MACH, MACL, and SR.
2021-11-22Revert unintended commit.thorpej
2021-11-22Gah, fix two typos.thorpej
2021-11-22Teach the LLVM-derived unwinder about the DWARF pseudo-register definedthorpej
by GCC for AArch64 to hold the return address where the signal trampoline will resume.
2021-11-21Teach the LLVM-derived unwinder about the alternate DWARF pseudo-registerthorpej
that GCC defines for the PC / return address. This is simply an alias for the same internal PC register number.
2021-11-21Teach the LLVM-derived unwinder about the DWARF pseudo-register definedthorpej
by GCC for PPC32 to hold the return address where the signal trampoline will resume, as well as for the CTR and XER registers.
2021-11-21Add parenthesesskrll
2021-11-20Teach the LLVM-derived unwinder about the DWARF pseudo-register definedthorpej
by GCC for Alpha to hold the return address where the signal trampoline will resume.
2021-11-20- Teach the LLVM-derived unwinder about the DWARF pseudo-registers definedthorpej
by GCC for MIPS64 to hold the MDHI and MDLO registers, as well as the return address where the signal trampoline will resume. - In the MIPS64 validFloatVectorRegister(), compare against the internal register numbers, not the DWARF register numbers.
2021-11-18- Teach the LLVM-derived unwinder about the DWARF pseudo-registers definedthorpej
by GCC for MIPS to hold the MDHI and MDLO registers, as well as the return address where the signal trampoline will resume. XXX Same treatment is needed for MIPS64, but not done as part of this commit. - In the MIPS validFloatVectorRegister(), compare against the internal register numbers, not the DWARF register numbers.
2021-08-09s/aligment/alignment/ + one more typo fix in comments.andvar
2021-05-31PR toolchain/55837rin
Stop using enum for flags, as per request from joerg. #define constants and #undef after use.
2021-05-31PR toolchain/55837rin
Bump LAST_REGISTER and LAST_RESTORE_REG to REGNO_ARM32_S31 for arm. There are two numbering schemes for VFPv2 registers: s0-s31 and d0-d15. The former is used by GCC, and the latter is by LLVM. Since libunwind was derived from LLVM, it has never supported the former. This results in crashes for GCC-compiled binaries in exception handler of C++, if it encounters VFPv2 registers when unwinding frames. This commit adds support for s0-s31 numbering to libunwind. I choose an implementation in which VFPv2 registers are ``double-counted'' as s0-s31 AND d0-d15. This does not cause real problems, since the former is only used by GCC, and the later is by LLVM. That is, different numbering schemes cannot appear in a same frame. To make sure, assertions are added in order to check this. I've confirmed that no regression for ATF both for GCC- and LLVM-compiled userlands.
2021-05-31PR toolchain/55837rin
Fix logic error in copyFloatVectorRegister() for arm; copy s0-s31 or d0-d31, not both.
2021-05-31PR toolchain/55837rin
Fix pointer arithmetic when copying s0-s31 registers for arm.
2021-05-31PR toolchain/55837rin
Fix DWARF/internal register numbers of s31 for arm.
2021-05-31PR toolchain/55837rin
Fix for jumpto() armeb; use word-wise load for flags, instead of byte-wise one.
2021-05-31PR toolchain/55837rin
copyFloatVectorRegister(): Assert register number is valid to make sure.
2021-05-31PR toolchain/55837rin
Misc style fixes for clarity: - Rename lazyVFP1() and lazyVFP3() to lazyVFPv2() and lazyVFPv3(), respectively. Note that VFPv1 was obsoleted and replaced by VFPv2. - Introduce enum for flags. - Add few comments. No functional changes.
2021-02-28Defer acquiring the FDE lock until after the allocation. This can avoidjoerg
nesting issues between malloc and backtrace when using LSan.
2021-02-23Redo the aarch64 support in libunwind. This included a number of bugsjoerg
starting from returning the wrong value from the constructor to completely bogus offset computations. Drop the ELR support for now.
2021-02-23The return address register entry is the DWARF register. On PowerPC,joerg
this is not the same as the internal encoding, since the Link Register is deliberately non-continous from the other general purpose register values. To handle this, always translate the value into the internal format.
2019-11-17Explicitly compile libunwind with vfp3 because gcc-8 defaults to neonchristos
and breaks exceptions.
2019-02-04use __builtin_unreachable() after calls that panic or switch contextmrg
2018-07-17The semantics of DW_CFA_GNU_args_size have changed subtile over thejoerg
years. Adopt the new convention that it is call-site specific and that it should be applied before moving the IP by personality routines, but not during normal unwinding. Further discussion can be found in LLVM's phabricator review D38680.
2018-07-17Remove redundant setIP call overwritten a few lines later.joerg
2017-11-02Avoid negative shift.christos
2017-07-13GCC 5.3 likes to emit unwind data with float registers, i.e. registerjoerg
halfs. Compensate.
2015-05-25Use ARM_ENTRY since these aren't thumb compatible.matt
2015-02-17Provide _Unwind_Find_FDE for libgcc_s compatibility.joerg
2015-01-29Force FPU support for Clang, don't disable IAS completely.joerg
2015-01-29Fix binary search when search value is in the last block, but not equaljoerg
to the start of the range. PR 49444.
2014-10-23prefer our own unwind.hchristos
2014-09-27Introduce a separate bit mask for the return address. Use it on HPPA.joerg
2014-09-03Add OR1K supportmatt
2014-08-10Changes to existing files to enable building AARCH64 userland.matt
evbarm64-el This is clang only. While gcc4.8 supports aarch64, no netbsd support has been written for aarch64 with gcc4.8.
2014-07-20Fix braino in last commit and free the node iff the insert failed.joerg
2014-07-14Use static_cast for rb_tree_insert_node void * return value.joerg
2014-06-30IAS is clang specific.joerg
2014-06-28.fpu is not handled correctly by LLVM's assembler parser, so use GAS forjoerg
now.
2014-06-13Split COPTS.libunwind.cxx into multiple lines.matt
2014-06-13remove the build support for GCC 4.1, and any hacks i found for it.mrg
there could still be more -- i only looked for lines matching both "HAVE_GCC" and "4" as words (grep -w.)
2014-05-14Lazy VFP processing works a lot better if the functions contain a returnjoerg
instruction.
2014-05-11Support DWARFish unwind for ARM.joerg
2014-05-03Missing register validation check.joerg
2014-04-28GC unwind_info_size.joerg
2014-04-26Use the return address register from the CIE. Based on patch from Nickjoerg
Kledzik.
2014-04-26Add initial unwind support for MIPS and MIPS64.joerg