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netbsd
lockcount-9.3
lockdoc-10.99.5
lockdoc-10.99.5-vfs
lockdoc-9.3
lockdoc-9.3-vfs
trunk
NetBSD fork for lockdoc analysis
merlin@scholz.ruhr
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cpuctl
Age
Commit message (
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Author
2023-07-06
Add Alder Lake-N.
msaitoh
2023-07-05
CPU model 0x5a is not Atom E3500 but Atom Z3500.
msaitoh
2023-03-06
Unless -v is given, ignore EEXIST errors from the IOC_CPU_UCODE_APPLY ioctl()
kre
2023-02-14
Add some CPUID bits from PPR for AMD Family 19h Model 61h Revision B1.
msaitoh
2023-02-03
MPIDR is 64bits. Without this AFF3 would always be zero.
skrll
2022-12-30
Add Raptor Lake and Sapphire Rapids.
msaitoh
2022-12-30
Print cpuid 7 sub-leaf 1 %ebx, %edx and sub-leaf 2 %edx.
msaitoh
2022-11-17
s/features 2/features2/
msaitoh
2022-11-16
s/Instruction-Based Sampling/IBS/
msaitoh
2022-11-16
Add CPUID Fn8000_0022 AMD Extended Performance Monitoring and Debug.
msaitoh
2022-11-16
Add CPUID Fn8000_0021 AMD Extended Features Identification 2.
msaitoh
2022-11-16
Print AMD RAS features and Instruction-Based Sampling features.
msaitoh
2022-08-06
s/blity/bility/ in various words, mainly in comments.
andvar
2022-06-15
Modify output of CPUID Fn0000000a.
msaitoh
2022-04-30
add CPU_ID_APPLE_M1_ICESTORM and CPU_ID_APPLE_M1_FIRESTORM.
ryo
2022-02-01
allow "cpuN" as well as "N" to specific a CPU.
mrg
2022-01-29
Decode Intel Hybrid Information Enumeration (CPUID Fn0000_001a).
msaitoh
2022-01-27
Remove debug code and simplify. No functional change.
msaitoh
2022-01-13
Add Alder Lake, Rocket Lake and Sapphire Rapids. From the latest Intel SDM.
msaitoh
2022-01-06
display the raw value of each field when -v specified
ryo
2022-01-06
fix typo
ryo
2022-01-06
Added more field definitions for ARMv8.x system registers
ryo
2022-01-06
macroify. NFC.
ryo
2022-01-05
fix ID_AA64ISAR0_EL1.ATOMIC field definition
ryo
2021-12-11
remove clause 3 from all my licenses that aren't conflicting with
mrg
2021-12-09
Print 1GB TLB entry at the same leve's line.
msaitoh
2021-12-05
auxilary -> auxiliary
msaitoh
2021-10-27
decode SMT parts for AMD family >= 0x17, not just 0x17.
mrg
2021-10-07
Move some common functions into x86/identcpu_subr.c. No functional change.
msaitoh
2021-09-27
Improve variable sized TLB's output.
msaitoh
2021-09-27
Add Load Only TLB and Store Only TLB.
msaitoh
2021-09-27
Fix a bug that some TLB related lines were not printed.
msaitoh
2021-09-27
Add ':' for readability.
msaitoh
2021-07-12
Add 0x96(Elkhart Lake) and 0x9c(Jasper Lake).
msaitoh
2021-07-10
0x6a and 0x6c are 3rd gen Xeon Scalable (Ice Lake).
msaitoh
2021-05-17
Teach cpuctl(8) about some additional aarch64 feature bits.
riastradh
2021-01-16
trailing whitespace
jmcneill
2021-01-16
ID_AA64PFR0_EL1.GIC=0 means that the CPU interface system registers are
jmcneill
2021-01-04
sync cpuids[] of sys/arch/aarch64/aarch64/cpu.c r1.43
ryo
2020-11-24
- Print CPUID 0x8000008 %ebx on Intel, too. Intel now supports WBNOINVD.
msaitoh
2020-10-10
Report half-precision FP and SIMD support
jmcneill
2020-09-05
x86: fix several CPUID flags
maxv
2020-07-05
(cpuctl/aarch64) Add some more aa64isar0_eli1 flags.
riastradh
2020-07-01
show clidr_el1 and ctr_el0.
ryo
2020-06-01
Add 0xa5 and 0xa6 for Comet Lake.
msaitoh
2020-05-10
Teach cpuctl(8) about ARMv8.5-RNG RNDR/RNDRRS support.
riastradh
2020-04-21
Get TSC frequency from CPUID 0x15 and/or x16 for newer Intel processors.
msaitoh
2020-04-16
No functional change:
msaitoh
2020-04-06
Print CPUID 0x80000007 %edx on both Intel and AMD.
msaitoh
2020-04-06
Remove ci_max_ext_cpuid because it's the same as ci_cpuid_extlevel.
msaitoh
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