diff options
| author | mrg <mrg@NetBSD.org> | 2003-03-01 10:06:40 +0000 |
|---|---|---|
| committer | mrg <mrg@NetBSD.org> | 2003-03-01 10:06:40 +0000 |
| commit | ee06049914f7d60076c9eb4cee2d8fcf30a8eb8c (patch) | |
| tree | 3be2cd5598f559cc3eece358dc41662b15813788 /gnu/dist/toolchain/include/opcode/ppc.h | |
| parent | ddb9465f5fd2b174e59c55db790a491cc6ff8d3f (diff) | |
import of (most of) binutils 2.13.2.1. no top level, and cut down include/
libiberty. (gcc update later can update libiberty properly.)
Diffstat (limited to 'gnu/dist/toolchain/include/opcode/ppc.h')
| -rw-r--r-- | gnu/dist/toolchain/include/opcode/ppc.h | 26 |
1 files changed, 23 insertions, 3 deletions
diff --git a/gnu/dist/toolchain/include/opcode/ppc.h b/gnu/dist/toolchain/include/opcode/ppc.h index d23e1c695e9..f7db66f63a8 100644 --- a/gnu/dist/toolchain/include/opcode/ppc.h +++ b/gnu/dist/toolchain/include/opcode/ppc.h @@ -1,5 +1,6 @@ /* ppc.h -- Header file for PowerPC opcode table - Copyright 1994, 1995, 1999, 2000 Free Software Foundation, Inc. + Copyright 1994, 1995, 1999, 2000, 2001, 2002 + Free Software Foundation, Inc. Written by Ian Lance Taylor, Cygnus Support This file is part of GDB, GAS, and the GNU binutils. @@ -89,7 +90,22 @@ extern const int powerpc_num_opcodes; #define PPC_OPCODE_64_BRIDGE (0400) /* Opcode is supported by Altivec Vector Unit */ -#define PPC_OPCODE_ALTIVEC (01000) +#define PPC_OPCODE_ALTIVEC (01000) + +/* Opcode is supported by PowerPC 403 processor. */ +#define PPC_OPCODE_403 (02000) + +/* Opcode is supported by PowerPC BookE processor. */ +#define PPC_OPCODE_BOOKE (04000) + +/* Opcode is only supported by 64-bit PowerPC BookE processor. */ +#define PPC_OPCODE_BOOKE64 (010000) + +/* Opcode is only supported by Power4 architecture. */ +#define PPC_OPCODE_POWER4 (020000) + +/* Opcode isn't supported by Power4 architecture. */ +#define PPC_OPCODE_NOPOWER4 (040000) /* A macro to extract the major opcode from an instruction. */ #define PPC_OP(i) (((i) >> 26) & 0x3f) @@ -121,6 +137,7 @@ struct powerpc_operand operand value is legal, *ERRMSG will be unchanged (most operands can accept any value). */ unsigned long (*insert) PARAMS ((unsigned long instruction, long op, + int dialect, const char **errmsg)); /* Extraction function. This is used by the disassembler. To @@ -140,7 +157,8 @@ struct powerpc_operand non-zero if this operand type can not actually be extracted from this operand (i.e., the instruction does not match). If the operand is valid, *INVALID will not be changed. */ - long (*extract) PARAMS ((unsigned long instruction, int *invalid)); + long (*extract) PARAMS ((unsigned long instruction, int dialect, + int *invalid)); /* One bit syntax flags. */ unsigned long flags; @@ -229,6 +247,8 @@ extern const struct powerpc_operand powerpc_operands[]; prints these with a leading 'v'. */ #define PPC_OPERAND_VR (010000) +/* This operand is for the DS field in a DS form instruction. */ +#define PPC_OPERAND_DS (020000) /* The POWER and PowerPC assemblers use a few macros. We keep them with the operands table for simplicity. The macro table is an |
