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authortoddpw <toddpw@NetBSD.org>2000-07-25 09:57:59 +0000
committertoddpw <toddpw@NetBSD.org>2000-07-25 09:57:59 +0000
commit6c80daae8d14127c4e87acbee23c796fce8970b3 (patch)
treef75f741ca00977d7cb33cb56805afa6479de3f51 /sys/arch/sparc/dev/tctrl.c
parentb38bba4202f81746155ad970275f0317c4bb3055 (diff)
Ignore all undefined bits in the Tadpole microcontroller status register.
Only the low nibble is defined, and on at least one 3gx (mine) there is an undefined bit which reads as a one -- bit 6 (0x40). This screwed tctrl_intr() which would loop forever, thinking it always had new events to process.
Diffstat (limited to 'sys/arch/sparc/dev/tctrl.c')
-rw-r--r--sys/arch/sparc/dev/tctrl.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/sys/arch/sparc/dev/tctrl.c b/sys/arch/sparc/dev/tctrl.c
index 570493f0477..754cd6574cb 100644
--- a/sys/arch/sparc/dev/tctrl.c
+++ b/sys/arch/sparc/dev/tctrl.c
@@ -1,4 +1,4 @@
-/* $NetBSD: tctrl.c,v 1.11 2000/07/09 20:57:47 pk Exp $ */
+/* $NetBSD: tctrl.c,v 1.12 2000/07/25 09:57:59 toddpw Exp $ */
/*-
* Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -269,7 +269,7 @@ tctrl_intr(arg)
again:
/* find out the cause(s) of the interrupt */
- v = tctrl_read(sc, TS102_REG_UCTRL_STS);
+ v = tctrl_read(sc, TS102_REG_UCTRL_STS) & TS102_UCTRL_STS_MASK;
/* clear the cause(s) of the interrupt */
tctrl_write(sc, TS102_REG_UCTRL_STS, v);