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authorandvar <andvar@NetBSD.org>2021-12-10 20:36:02 +0000
committerandvar <andvar@NetBSD.org>2021-12-10 20:36:02 +0000
commitec0fc95dd18bb0e67dfbb1e4c92f0d5dcc5a8a43 (patch)
treecadd32f9c2c615b79b2b0b7fc1ae2de385601faf /sys/arch/sparc/dev
parent2c650dfce1d11c9d2b90557108902fac4c2f6baf (diff)
s/occured/occurred/ in comments, log messages and man pages.
Diffstat (limited to 'sys/arch/sparc/dev')
-rw-r--r--sys/arch/sparc/dev/sxreg.h14
1 files changed, 7 insertions, 7 deletions
diff --git a/sys/arch/sparc/dev/sxreg.h b/sys/arch/sparc/dev/sxreg.h
index 05b14ff4961..f496323ba32 100644
--- a/sys/arch/sparc/dev/sxreg.h
+++ b/sys/arch/sparc/dev/sxreg.h
@@ -1,4 +1,4 @@
-/* $NetBSD: sxreg.h,v 1.20 2021/12/08 17:03:38 macallan Exp $ */
+/* $NetBSD: sxreg.h,v 1.21 2021/12/10 20:36:03 andvar Exp $ */
/*-
* Copyright (c) 2013 The NetBSD Foundation, Inc.
@@ -82,13 +82,13 @@
*/
#if 0
#define SX_PB 0x00001000 /* enable page bound checking */
-#define SX_WO 0x00002000 /* write occured ( by SX ) */
+#define SX_WO 0x00002000 /* write occurred ( by SX ) */
#define SX_GO 0x00004000 /* start/stop the processor */
#define SX_MT 0x00008000 /* instruction queue is empty */
#endif
#define SX_PB 0x00000400 /* enable page bound checking */
-#define SX_WO 0x00000800 /* write occured ( by SX ) */
+#define SX_WO 0x00000800 /* write occurred ( by SX ) */
#define SX_GO 0x00001000 /* start/stop the processor */
#define SX_JB 0x00002000 /* Jammed/Busy specifies the type of events */
/* which increment the SX timer */
@@ -98,16 +98,16 @@
/* instruction is pending in the Q */
#define SX_B0MOD 0x00010000 /* When set by SX it indicates that a write */
/* to bank zero of the SX registers (0-31) */
- /* occured */
+ /* occurred */
#define SX_B1MOD 0x00020000 /* When set by SX it indicates that a write */
/* to bank 1 of the SX registers (32-63) */
- /* occured */
+ /* occurred */
#define SX_B2MOD 0x00040000 /* When set by SX it indicates that a write */
/* to bank 2 of the SX registers (64-95) */
- /* occured */
+ /* occurred */
#define SX_B3MOD 0x00080000 /* When set by SX it indicates that a write */
/* to bank 3 of the SX registers (96-127) */
- /* occured */
+ /* occurred */
/* SX_ERROR */
#define SX_SE1 0x00000001 /* illegal instruction */