| Age | Commit message (Collapse) | Author |
|
|
|
reference count, and thus now many bits we need to scare up.
|
|
PT page reference count, but add an XXX comment stating the desire to
find a safely-unused field in the vm_page structure when pages are in-
use as PT pages, so that we can save the 8 bytes per page needed for
this.
|
|
|
|
pmap_tlb_context structure, and free them back in bulk after we
release all of our locks (as we do with PT pages that are freed).
|
|
|
|
the PV entry list pointer in struct vm_page_md. This reduces the size
of that structure from 16 bytes to 8, and will go a fair way to making
up for increasing the size of struct pv_entry in a future commit.
|
|
for a page.
|
|
UVM loan transaction, so use the vm_page::loan_count field as the PT
page reference count.
|
|
|
|
of vm_page structures. Define and use a generic routine to free such a list
back to UVM.
In pmap_remove_internal(), KASSERT that no PT pages are queued up to be
freed when removing mappings from the kernel pmap.
|
|
and into each CPU's pmap_percpu area. This pointer is constant for the
life of the pmap, and moving it gives us an additional 8 bytes in the
shared pmap structure.
Because the kernel pmap does not have per-CPU data, all places where we
need the kernel pmap's lev1map now just reference kernel_lev1map directly.
|
|
track it with a separate field in the pmap_percpu. Not only does this
reduce cache line contention ever so slightly, it also frees up a field
in the shared portion of the pmap structure.
|
|
No functional change.
|
|
as the forward scenario, for example if a pmap_page_protect() to remove
all mappings results in the freeing of a PT page. It therefore needs
to do the same reference counting dance as pmap_tlb_shootdown_pv().
Also fix a use-after-free error in pmap_page_protect().
Add / tweak some assertions, and shrink the pmap::pm_count field from
long to unsigned int (which gave me a spare unsigned int field for
debugging purposes).
PR port-alpha/56201.
|
|
logic in prom.c, and rename it _PROM_MAY_USE_PROM_CONSOLE in a few places
it's still needed.
|
|
function. Call in from pmap_bootstrap() for the boot CPU, and
from cpu_hatch() for secondaary CPUs.
- Eliminiate the dedicated I-stream memory barrier IPI; handle it all from
the TLB shootdown IPI. Const poison, and add some additional memory
barriers and a TBIA to the PAUSE IPI.
- Completly rewrite TLB management in the alpha pmap module, borrowing
somoe ideas from the x86 pmap and adapting them to the alpha environment.
See the comments for theory of operation. Add a bunch of stats that
can be reported (disabled by default).
- Add some additional symbol decorations to improve cache behavior on
MP systems. Ensure coherency unit alignment for several structures
in the pmap module. Use hashed locks for pmap structures.
- Start out all new processes on the kernel page tables until their
first trip though pmap_activate() to avoid the potential of polluting
the current ASN in TLB with cross-process mappings.
|
|
|
|
true, all mappings have been removed, the pmap is totally cleared out, and
UVM can then avoid doing the work to call pmap_remove() for each map entry.
If false, either nothing has been done, or some helpful arch-specific voodoo
has taken place.
|
|
UBC optimizations.
|
|
Addresses PR/48488.
|
|
|
|
easier).
u_int{8,16,32,64}_t -> uint{*}_t
Change all old-style definitions to C89 prototypes.
Whitespace cleanup.
Constification in db_disasm.c
|
|
it's used only by pmap. vmparam.h has definitions for wider
audience.
All GENERIC kernels build tested, except ia64.
powerpc/include/booke/vmparam.h has one too, but it has no pmap.h,
so it's left as is.
|
|
used them for a long time.
|
|
|
|
|
|
which is now the "API" provided by the pmap module. pmap_kernel()
remains as the syntactic sugar.
Bonus cosmetics round: move all the pmap_t pointer typedefs into
uvm_pmap.h.
Thanks to Greg Oster for providing cpu muscle for doing test builds.
|
|
|
|
|
|
|
|
future commit will replace use of TRUE and FALSE with true and false.
|
|
|
|
new, and some apps compile things in C89 mode. C89 keywords stay.
As per core@.
|
|
|
|
|
|
and make the stack and heap non-executable by default. the changes
fall into two basic catagories:
- pmap and trap-handler changes. these are all MD:
= alpha: we already track per-page execute permission with the (software)
PG_EXEC bit, so just have the trap handler pay attention to it.
= i386: use a new GDT segment for %cs for processes that have no
executable mappings above a certain threshold (currently the
bottom of the stack). track per-page execute permission with
the last unused PTE bit.
= powerpc/ibm4xx: just use the hardware exec bit.
= powerpc/oea: we already track per-page exec bits, but the hardware only
implements non-exec mappings at the segment level. so track the
number of executable mappings in each segment and turn on the no-exec
segment bit iff the count is 0. adjust the trap handler to deal.
= sparc (sun4m): fix our use of the hardware protection bits.
fix the trap handler to recognize text faults.
= sparc64: split the existing unified TSB into data and instruction TSBs,
and only load TTEs into the appropriate TSB(s) for the permissions.
fix the trap handler to check for execute permission.
= not yet implemented: amd64, hppa, sh5
- changes in all the emulations that put a signal trampoline on the stack.
instead, we now put the trampoline into a uvm_aobj and map that into
the process separately.
originally from openbsd, adapted for netbsd by me.
|
|
Patches provided by Joel Baker in PR 22364, verified by myself.
|
|
pmap instead of array u_long. A bit of space is wasted but it supresses
the -Wcast-align warning.
|
|
prevent gcc complaining about bitwise operations on pointers.
|
|
objects. Clients of the pool_cache API must consistently use
the "paddr" variants or not, otherwise behavior is undefined.
Enable this on Alpha, ARM, MIPS, and x86. Other platforms must
define POOL_VTOPHYS() in the appropriate manner in order to enable
the feature.
Part 1 of a series of simple patches contributed by Wasabi Systems
to improve network performance.
|
|
|
|
machines.
|
|
alas, I did not. doh.
|
|
|
|
This will allow improvements to the pmaps so that they can more easily defer expensive operations, eg tlb/cache flush, til the last possible moment.
Currently this is a no-op on most platforms, so they should see no difference.
Reviewed by Jason.
|
|
bit more.
|
|
be locked before it can be marked as `active' on a processor.
- Require that pmaps other than the kernel pmap be locked when they
are passed to pmap_tlb_shootdown(). This, combined with the locking
protocol tweak, allow us to get a consistent view of `activeness' of
a pmap, which means we can optmize away a lot of TLB shootdown traffic
for user pmaps.
- Borrow an idea from the i386mp branch; use the normal SHOOTDOWN IPI
to deal with hitting the entire TLB, and garbage-collect the TBIA
and TBIAP IPIs.
|
|
|
|
|