| Age | Commit message (Collapse) | Author |
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arrays to use DEVMAP_ENTRY{,_END}
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It's less letters, matches other similar variables and will help with
sharing code between the two architectures.
NFCI.
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by creating an EFI RT pmap that can be activated / deactivated when
required.
Adds support for EFI RT to ARM_MMU_EXTENDED (ASID) 32-bit Arm machines.
On Arm64 the usage of pmapboot_enter is reduced and the mappings are
created much later in the boot process -- now in cpu_startup_hook.
Backward compatiblity for KVA mapped RT from old bootaa64.efi is
maintained.
Adding support to other platforms should be easier as a result.
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1836 is 2048-128(MAXTSIZ)-64(MAXSSIZ).
Gives us a fighting chance to build rust natively.
OK'ed by skrll@
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- don't access BSS variables when __md_early
- centralise the INIT_ARM_STACK_{SHIFT,SIZE} defines and create a new
INIT_ARM_TOTAL_STACK
- Only create L1PT entries in kasan_md_shadow_map_page if
arm32_kernel_vm_init hasn't created the L2PTs (and their L1PT entries)
- Add some comments to explain what's going on
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- Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often
by MI code. It also makes curlwp preemption safe,
- Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs
can see spurious ASTs (which doesn't cause a problem, it just means some
time may be wasted).
- Make sure ASTs are always set on the same CPU as the target LWP, and
delivered via IPI if posted from a remote CPU so that they are resolved
quickly.
- Add some cache line padding to struct cpu_info.
- Add a memory barrier in a couple of places where ci_curlwp is set. This
is needed whenever an LWP that is resuming on the CPU could hold an
adaptive mutex. The barrier needs to drain the CPU's store buffer, so
that the update to ci_curlwp becomes globally visible before the LWP can
resume and call mutex_exit().
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builds.
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Thanks to maxv for many pointers and reviews.
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fdt/platform.h as a nice side effect
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NBPG is fixed at 4K
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Reported by Patrick Welche
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true, all mappings have been removed, the pmap is totally cleared out, and
UVM can then avoid doing the work to call pmap_remove() for each map entry.
If false, either nothing has been done, or some helpful arch-specific voodoo
has taken place.
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This did not do what I thought it did. opt_diagnostic.h is only for
the unused _DIAGNOSTIC, which seems like an abortive attempt to
incrementally convert DIAGNOSTIC to an opt_*.h option rather than a
command-line option.
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...at least, in header files, which may not have already included
libkern.h.
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- start sharing more code around the AP startup messaging.
- call arm_cpu_topology_set early so that ci_core_id is available for
drivers, e.g. bcm2835_intr.c
- both arm and aarch64 now have
- a static cpu_info_store array
- the same arm_cpu_{hatched,mbox}
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of 2:2 and others have a split of 3:1.
Tested by martin@ Thanks
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mapped as strongly-ordered which meant that unaligned accesses would fault.
armv7_generic_bs_map now maps pages with PMAP_DEV which is treated as SO
bus_dma continues to use PMAP_NOCACHE as appropriate, but this now get
mapped to the correct memory attribute bits for armv[67]
DEVMAP_ENTRY usees a new flag PTE_DEV.
The workaround for the unaligned access faults is now removed.
XXX Other armv[67] boards bus_space implementations should be checked.
XXX There is scope to reduce the difference to aarch64
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change
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creating a new pool l1ttpl for the userland L1 translation table which
needs to be 8KB and 8KB aligned.
Limit the pool to maxproc and add hooks to allow the sysctl changing of
maxproc to adjust the pool.
This comes at a 5% performance penalty for build.sh -j8 kernel on a
Tegra TK1.
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nick@ is fixing the cache pages issue to use a separate pool.
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Called at end of cpu_startup. Can be defined in, e.g., evbarm to do
additional stuff after cpu_startup. Defined as a weak alias to a
function that does nothing, so optional.
ok jmcneill
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Makes no difference to binaries except for aarch64 where it's required
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