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2023-06-25G/C an unused struct cpu_info memberskrll
2022-06-25pic: Update ci_cpl in pic_set_priority callback.jmcneill
Not all ICs need interrupts disabled to update the priority. DAIF accesses are not cheap, so push the update of ci_cpl from pic_set_priority to the IC's pic_set_priority callback, and let the IC driver determine whether or not it needs interrupts disabled.
2021-12-18arm: Forward-declare `struct proc' before using in prototype.riastradh
2021-11-01Move arm_cache_info from cpufunc.h to cpu.hskrll
2021-10-31Rework Arm (32bit and 64bit) AP startup so that cpu_hatch doesn't sleep.skrll
The AP initialisation code in cpu_init_secondary_processor will read and initialise the required system registers and state for the BP to attach and report. Rework the interrupt handler code for this new sequence. Thankfully, this removes a bunch of code for bcm2836mp. The VFP detection handler on <= armv7 relies on the global undefined handler being in place until the BP attaches vfp. That is, after the APs have been spun up. gicv3_its.c has a serialisation issue which is protected against in the gicv3_its_cpu_init, which is called from cpu_hatch, with a spin lock. The serialisation issue needs addressing more completely. Tested on RPI3, Apple M1, QEMU, and lx2k Fixes PR port-arm/56264: diagnostic assertion "l->l_stat == LSONPROC" failed on RPI3
2021-08-14Improved the performance of kernel profiling on MULTIPROCESSOR, and possible ↵ryo
to get profiling data for each CPU. In the current implementation, locks are acquired at the entrance of the mcount internal function, so the higher the number of cores, the more lock conflict occurs, making profiling performance in a MULTIPROCESSOR environment unusable and slow. Profiling buffers has been changed to be reserved for each CPU, improving profiling performance in MP by several to several dozen times. - Eliminated cpu_simple_lock in mcount internal function, using per-CPU buffers. - Add ci_gmon member to struct cpu_info of each MP arch. - Add kern.profiling.percpu node in sysctl tree. - Add new -c <cpuid> option to kgmon(8) to specify the cpuid, like openbsd. For compatibility, if the -c option is not specified, the entire system can be operated as before, and the -p option will get the total profiling data for all CPUs.
2021-08-08Re-applyskrll
Move 'struct pic_pending' from percpu to struct cpu_info. Saves a few instructions in splx. There is(/was) no need to use atomic operations on the percpu / cpu_info members, so don't. Finally removng the use of percpu should help avoid problems with "late" attaching cpus.
2021-03-27Revert recent pic optimizations until I have more time to work on this.jmcneill
2021-02-21Keep current hardware priority value in struct cpu_info and use it insteadjmcneill
of reading icc_pmr_el1 in gicv3_set_priority.
2021-02-20Move 'struct pic_pending' from percpu to struct cpu_info. Saves a fewjmcneill
instructions in splx.
2020-08-17swap sys/param.h for machine/param.h. this still obtains themrg
wanted COHERENCY_UNIT, while avoiding have a cascade of failures where sys/mutex.h ends up including arm/cpu.h which ends up including sys/resourcevar.h and then sys/mutex.h, but as the first includer of sys/mutex.h has defined the idempotent header define, the second one is empty, and as kmutex_t isn't defined by the first attempt yet the kmutex_t used in resourcevar.h generates an error. should fix evbarm v5/v5eb, hpcarm, iyonix and zaurus builds. tested building iyonix, zaurus and evbarmv7hf.
2020-08-16G/C MP_CPU_INFO_MEMBERSskrll
2020-08-14Mirror the changes to aarch64 andskrll
- Switch to TPIDRPRW_IS_CURLWP, because curlwp is accessed much more often by MI code. It also makes curlwp preemption safe, - Make ASTs operate per-LWP rather than per-CPU, otherwise sometimes LWPs can see spurious ASTs (which doesn't cause a problem, it just means some time may be wasted). - Make sure ASTs are always set on the same CPU as the target LWP, and delivered via IPI if posted from a remote CPU so that they are resolved quickly. - Add some cache line padding to struct cpu_info. - Add a memory barrier in a couple of places where ci_curlwp is set. This is needed whenever an LWP that is resuming on the CPU could hold an adaptive mutex. The barrier needs to drain the CPU's store buffer, so that the update to ci_curlwp becomes globally visible before the LWP can resume and call mutex_exit().
2020-06-29Implement fpu_kern_enter/leave for arm32.riastradh
2020-03-29Provide a curpcbskrll
2020-03-09Don't expose curproc/curlwp and other random kernel macros/functions/variableschristos
du-jour.
2020-02-15Various updates and improvements to cpu start up on arm/aarch64skrll
- start sharing more code around the AP startup messaging. - call arm_cpu_topology_set early so that ci_core_id is available for drivers, e.g. bcm2835_intr.c - both arm and aarch64 now have - a static cpu_info_store array - the same arm_cpu_{hatched,mbox}
2020-01-22#ifdef whack-a-mole for the pmap_maxproc_set functionalityskrll
2020-01-20s/_ARM_ARCH_6/ARM_MMU_EXTENDED/ in the #ifdef for the recent 4k pagesskrll
change
2020-01-18Use 4K pages on ARM_MMU_EXTENDED platforms (all armv[67] except RPI) byskrll
creating a new pool l1ttpl for the userland L1 translation table which needs to be 8KB and 8KB aligned. Limit the pool to maxproc and add hooks to allow the sysctl changing of maxproc to adjust the pool. This comes at a 5% performance penalty for build.sh -j8 kernel on a Tegra TK1.
2020-01-15port the arm64 cpu topology setup for big.little to arm.mrg
rename arm64 cpu_do_topology() to arm_cpu_do_topology() and call it from both arm cpu_attach(). replace both aarch64_set_topology() inline code in arm cpu_attach() with new arm_cpu_do_topology(), which is called by the arm64 locore as well (possibly not needed, which would allow it to become static.) not yet tested on a real big.little armv7 system. tested on rockpro64 and pinebook pro.
2019-12-01Fix false sharing problems with cpu_info. Identified with tprof(8).ad
This was a very nice win in my tests on a 48 CPU box. - Reorganise cpu_data slightly according to usage. - Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc). - On x86, put some items in their own cache lines according to usage, like the IPI bitmask and ci_want_resched.
2019-11-21mi_userret(): take care of calling preempt(), set spc_curpriority directly,ad
and remove MD code that does the same.
2019-10-19Increase aarch64 MAXCPUS to 256.jmcneill
2019-01-03Start CPUs more like aarch64 by using a cpu_mpidr array (if populated)skrll
to map MPIDRs to an index for each CPU. Towards big.LITTLE support.
2018-10-25Align struct cpu_info member names. NFC.skrll
2018-10-18Provide generic start code that assumes the MMU is off and caches areskrll
disabled as per the linux booting protocol for ARMv6 and ARMv7 boards. u-boot image type should be changed to 'linux' for correct behaviour. The new start code builds a minimal "bootstrap" L1PT with cached access disabled and uses the same table for all processors. AP startup is performed in less steps and more code is written in C. The bootstrap tables and stack are placed into an (orphaned) section "_init_memory" which is given to uvm when it is no longer used. Various kernels have been converted to use this code and tested. Some boards were provided by TNF. Thanks! The GENERIC kernel now boots on boards using the TEGRA, SUNXI and EXYNOS kernels. The GENERIC kernel will also work on RPI2 using u-boot. Thanks to martin@ and aymeric@ for testing on parallella and nanosoc respectively
2018-08-22- Cleanup for dynamic sysctl:msaitoh
- Remove unused *_NAMES macros for sysctl. - Remove unused *_MAXID for sysctls. - Move CTL_MACHDEP sysctl definitions for m68k into m68k/include/cpu.h and use them on all m68k machines.
2018-04-01Add initial support for ARMv8 (AARCH64) (by nisimura@ and ryo@)ryo
- sys/arch/evbarm64 is gone and integrated into sys/arch/evbarm. (by skrll@) - add support fdt. evbarm/conf/GENERIC64 fdt (bcm2837,sunxi,tegra) based generic 64bit kernel config. (by skrll@, jmcneill@)
2018-01-24Remove port-acorn26skrll
OK core@
2017-12-16CPU_INFO_FOREACH() must always iterate at least the boot cpu.mrg
document this in sys/cpu.h and fix the arm and mips versions to check ncpu is non zero before using it as an iterator max. this should fix the new assert in init_main.c.
2017-04-04Fix rcs tag.sevan
2017-03-27Expose correct cpu_number(), CPU_IS_PRIMARY() and CPU_INFO_FOREACH() forskrll
modules so that the dtrace module works on an MP system.
2017-03-06Trailing whitespaceskrll
2015-04-15Make setsoftast take a cpu_info *matt
2015-04-14__HAVE_PREEEMPTION -> __HAVE_PREEMPTIONjmcneill
2015-04-08Make sure TPIDRPRw_IS_CURLWP is being used when __HAVE_PREEEMPTION is defined.matt
2015-04-08Add basic support for __HAVE_PREEMPTION.matt
Use atomic ops for ci_astpending if __HAVE_PREEMPTION is defined.
2015-04-08Add an agnostic version of curlwp and curcpu() for modules since they won'tmatt
know if the kernel was built with TPIDRPRW_IS_CUR{LWP,CPU} or not.
2015-04-02Allow TPIDRPRW_IS_CURLWP to be used with MULTIPROCESSOR kernelsmatt
2014-11-23Fix TPIDRPRW_IS_CURLWP builds.skrll
A MULTIPROCESSOR kernel requires TPIDRPRW_IS_CURCPU.
2014-03-28Make ddb_regs, undefined & vfp evcnt's per cpu.matt
2014-02-26Move some static/global variables to here.matt
2013-11-06use ciichristos
2013-08-18Fix CLKF_INTR for EABI to (void) its argument so it isn't mark unused by thematt
optimizer.
2013-08-18<arm/locore.h> fallout (fixes some include ordering errors)matt
2013-08-18If _KMEMUSER, include <sys/intr.h>matt
2013-08-18There are only 16 faults.matt
2013-08-18Move parts of cpu.h that are not needed by MI code in <arm/locore.h>matt
Don't include <machine/cpu.h> or <machine/frame.h>, use <arm/locore.h> Use <arm/asm.h> instead of <machine/arm.h>
2013-01-28Add a machdep.fpu_present sysctl for ld.elf_so to use in ld.so.conf to loadmatt
libc_vfp.so.