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path: root/sys/arch/mips/include/cache_r4k.h
AgeCommit message (Collapse)Author
2020-07-26#define<tab>simonb
Nuke trailing whitespace.
2016-07-12Appease gcc and asmskrll
2016-07-12Fix RCSIdskrll
2016-07-11Use sdcache routines.matt
Remove old cache support. Switch to new cache routines.
2016-07-11Trailing whitespaceskrll
2016-07-11Change MIPS to use the common pmap code.matt
Switch to 8KB pages on CPUs with a R4K MMU. Simplify cache code. Merge in most of changes from matt-mips64 branch
2005-12-24Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.perry
2003-03-08Add support for R5k secondary caches, from code Chris Sekiya sent me a longrafal
time ago, with small tweaks by me. Since the R5k doesn't do VCE, the pmap still needs to be whacked for R5kSC CPUs to work correctly, but this is a start.
2003-02-17No need to protect headers with #ifdef _KERNEL if they're never installedsimonb
in /usr/include.
2002-11-17Add cache_r4k_op_8lines_{16,32} macros to perform cache ops on 8simonb
consecutive lines.
2002-03-05Add 4way 16/32-byte-line cache op primitives.simonb
2002-01-19add VR4131 cache-op bug workaround code.shin
we can't use Hit_WriteBack_Invalidate.
2001-12-23Added Vr4131 support.takemura
2001-11-23Add 32B/l L1 D/I-cache ops for newer ARC machines.tsutsui
2001-11-18Add 128b/l L2 cache ops.thorpej
2001-11-14Merge the thorpej-mips-cache branch onto the trunk. This is anthorpej
overhaul of how caches are handled for NetBSD's MIPS ports.