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riscv
Age
Commit message (
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Author
2023-07-04
riscv: Fix (U)INT64_C suffix to match gcc's built-in idea of types.
riastradh
2023-06-24
Always initialise ci_tlb_info in cpu_info_store[0].
skrll
2023-06-23
Pad the trapframe so it's a multiple of 16 bytes so that when a trapframe
skrll
2023-06-15
G/C file was renamed in recent commit.
skrll
2023-06-12
risc-v: MULTIPROCESSOR support
skrll
2023-06-12
sort
skrll
2023-06-12
Call / define fdtbus_cpus_md_attach for platforms with cpus @ fdt.
skrll
2023-06-10
Remove magic numbers. NFCI.
skrll
2023-06-10
Whitespace.
skrll
2023-06-02
follow the steps of Andrew Doran (ad) commit and fix more s/loose/lose/ typos.
andvar
2023-06-01
fix various typos in comments.
andvar
2023-05-28
Second arg to fdt_memory_remove_range is a size so pass dtbsize and not
skrll
2023-05-25
Fix CLKF_INTR so that not all time is shown as being spent in interrupts.
skrll
2023-05-14
Check for RB_HALT in cpu_reboot.
skrll
2023-05-08
Don't expose vaddr_t or register_t to userland. The gdb configure script
skrll
2023-05-08
Remove some #if 0'ed code
skrll
2023-05-08
KNF
skrll
2023-05-08
RISC-V: Add the Google Goldfish RTC to the GENERIC.common
skrll
2023-05-07
RISC-V support that works on QEMU with a single hart.
skrll
2023-04-22
G/C pte_index
skrll
2023-03-01
riscv: Optimization: Omit needless membar when triggering softint.
riastradh
2023-02-26
ci_data.cpu_kcpuset -> ci_kcpuset
skrll
2023-02-23
riscv: Add missing barriers in cpu_switchto.
riastradh
2023-02-09
Adjust _all_ cinclude of *.local files
abs
2023-02-09
Ensure GENERIC.local is always at the end of GENERIC
abs
2022-12-23
Fix RV builds
skrll
2022-12-13
KNF
skrll
2022-12-04
Restore t5 and t6 from the correct locations in exception_kernexit.
skrll
2022-12-04
ASSERT that md_astpending it zero for the new lwp.
skrll
2022-12-03
leading whitespace... oops
skrll
2022-12-03
Trailing whitespace
skrll
2022-12-03
Correct some pre-existing relocations and add some new ones.
skrll
2022-11-25
Add driver for SiFive FU540 PRCI clock controller.
jmcneill
2022-11-19
Fix some types
skrll
2022-11-19
Some comments
skrll
2022-11-19
Fix CONSADDR and save a label
skrll
2022-11-18
Fix SR_WPRI.
skrll
2022-11-17
Use updated defines for the user-mode sstatus value.
simonb
2022-11-17
Document lots of bits.
simonb
2022-11-17
Use better types and struct member names in the clockframe.
simonb
2022-11-15
Include GENERIC.local if it exists.
simonb
2022-11-15
Use similar macro-magic to aarch64 armreg.h to add per-csr
simonb
2022-11-13
Comment fix
skrll
2022-11-12
Add NFS_BOOT_DHCP option.
simonb
2022-11-12
Note some SV39 PTE bits defined in extensions.
skrll
2022-11-12
Use uintptr_t consistently rather than register_t
skrll
2022-11-11
The supervisor status register is the native word width, not fixed
simonb
2022-11-08
Parentheses police.
simonb
2022-11-08
Add cause register trap types, and some macros to access cause register
simonb
2022-11-08
Add a #define for XLEN, the RISC-V native base integer ISA width.
simonb
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