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2023-07-04riscv: Fix (U)INT64_C suffix to match gcc's built-in idea of types.riastradh
XXX pullup-10
2023-06-24Always initialise ci_tlb_info in cpu_info_store[0].skrll
Fixes non-MP boot for me.
2023-06-23Pad the trapframe so it's a multiple of 16 bytes so that when a trapframeskrll
is created on the stack SP remains 16-byte aligned as per the ABI requirements. Patch from Rin with some updates from me.
2023-06-15G/C file was renamed in recent commit.skrll
2023-06-12risc-v: MULTIPROCESSOR supportskrll
Add MULTIPROCESSOR support for RISC-V, but leave disabled for the moment as it's not 100% stable. Some other improvements to spl and cpu identification / reporting.
2023-06-12sortskrll
2023-06-12Call / define fdtbus_cpus_md_attach for platforms with cpus @ fdt.skrll
The RISC-V binding here seems somewhat of an abuse, but it exists in mainline linux.
2023-06-10Remove magic numbers. NFCI.skrll
Copyright maintenance while I'm here.
2023-06-10Whitespace.skrll
2023-06-02follow the steps of Andrew Doran (ad) commit and fix more s/loose/lose/ typos.andvar
also s/beyound/beyond/ and few others along the way, mainly in comments.
2023-06-01fix various typos in comments.andvar
2023-05-28Second arg to fdt_memory_remove_range is a size so pass dtbsize and notskrll
dtb + dtbsize
2023-05-25Fix CLKF_INTR so that not all time is shown as being spent in interrupts.skrll
2023-05-14Check for RB_HALT in cpu_reboot.skrll
2023-05-08Don't expose vaddr_t or register_t to userland. The gdb configure scriptskrll
needs this so it can detect struct lwp correctly.
2023-05-08Remove some #if 0'ed codeskrll
2023-05-08KNFskrll
2023-05-08RISC-V: Add the Google Goldfish RTC to the GENERIC.commonskrll
2023-05-07RISC-V support that works on QEMU with a single hart.skrll
Thanks for Simon Burge for plic(4).
2023-04-22G/C pte_indexskrll
2023-03-01riscv: Optimization: Omit needless membar when triggering softint.riastradh
When we are triggering a softint, it can't already hold any mutexes. So any path to mutex_exit(mtx) must go via mutex_enter(mtx), which is always done with atomic r/m/w, and we need not issue any explicit barrier between ci->ci_curlwp = softlwp and a potential load of mtx->mtx_owner in mutex_exit. PR kern/57240
2023-02-26ci_data.cpu_kcpuset -> ci_kcpusetskrll
NFCI.
2023-02-23riscv: Add missing barriers in cpu_switchto.riastradh
Details in comments. PR kern/57240
2023-02-09Adjust _all_ cinclude of *.local filesabs
- Ensure always at end - Use tab rather than spaces - Add consistent comment "Pull in optional local configuration - always at end" The only functional change is that a local file which tried to override an existing setting (eg with "no foo") would have failed in some cases before, but now will work
2023-02-09Ensure GENERIC.local is always at the end of GENERICabs
Where a GENERIC config had an existing inclusion of GENERIC.local, ensure it is always at the end of the file, with a consistent comment: # Pull in optional local configuration cinclude "arch/landisk/conf/GENERIC.local" This allows GENERIC.local to correctly override all options (This pass does not affect any GENERIC which did not already have an include of GENERIC.local)
2022-12-23Fix RV buildsskrll
2022-12-13KNFskrll
2022-12-04Restore t5 and t6 from the correct locations in exception_kernexit.skrll
From Simon.
2022-12-04ASSERT that md_astpending it zero for the new lwp.skrll
2022-12-03leading whitespace... oopsskrll
2022-12-03Trailing whitespaceskrll
2022-12-03Correct some pre-existing relocations and add some new ones.skrll
2022-11-25Add driver for SiFive FU540 PRCI clock controller.jmcneill
2022-11-19Fix some typesskrll
2022-11-19Some commentsskrll
2022-11-19Fix CONSADDR and save a labelskrll
2022-11-18Fix SR_WPRI.skrll
Tweak csr_cycle_read and csr_asid_write for code style, and add some KNF whitespace.
2022-11-17Use updated defines for the user-mode sstatus value.simonb
2022-11-17Document lots of bits.simonb
Remove bits no longer in the RISC-V supervisor spec. Update defines for the user-mode sstatus value.
2022-11-17Use better types and struct member names in the clockframe.simonb
Avoid a magic number in CLKF_USERMODE().
2022-11-15Include GENERIC.local if it exists.simonb
2022-11-15Use similar macro-magic to aarch64 armreg.h to add per-csrsimonb
read/write/set-bits/clear-bits inline functions. Keep the open-coded 32-bit version of riscvreg_cycle_read() than reads a 64-bit cycle counter values. Added benefit of fixing these so that the inline asm uses __volatile and aren't opmtimised to nops by the compiler.
2022-11-13Comment fixskrll
2022-11-12Add NFS_BOOT_DHCP option.simonb
2022-11-12Note some SV39 PTE bits defined in extensions.skrll
Fix pte_nv_entry for the kernel. Fix pte_pde_ptpage. PTE.{X,W,R} must be zero for pointer to next level.
2022-11-12Use uintptr_t consistently rather than register_tskrll
2022-11-11The supervisor status register is the native word width, not fixedsimonb
at 32 bits.
2022-11-08Parentheses police.simonb
2022-11-08Add cause register trap types, and some macros to access cause registersimonb
fields.
2022-11-08Add a #define for XLEN, the RISC-V native base integer ISA width.simonb