| Age | Commit message (Expand) | Author |
| 2023-02-23 | nvmm: Filter CR4 bits on x86 SVM (AMD). | riastradh |
| 2022-08-20 | x86: Split most of pmap.h into pmap_private.h or vmparam.h. | riastradh |
| 2021-03-26 | Implement nvmm_vcpu::stop, a race-free exit from nvmm_vcpu_run() without | reinoud |
| 2020-10-24 | Issue 64-bit versions of *XSAVE* for 64-bit amd64 programs | mgorny |
| 2020-09-08 | nvmm-x86: avoid hogging behavior observed recently | maxv |
| 2020-09-08 | nvmm: cosmetic changes | maxv |
| 2020-09-06 | Fix fallout from previous uvm.h cleanup. | riastradh |
| 2020-09-05 | Round of uvm.h cleanup. | riastradh |
| 2020-09-05 | x86: rename PGEX_X -> PGEX_I | maxv |
| 2020-09-05 | nvmm: update copyright headers | maxv |
| 2020-09-04 | nvmm-x86-svm: check the SVM revision | maxv |
| 2020-08-26 | nvmm-x86-svm: improve the handling of MSR_EFER | maxv |
| 2020-08-26 | nvmm-x86: improve the handling of RFLAGS.RF | maxv |
| 2020-08-26 | nvmm-x86-svm: don't forget to intercept INVD | maxv |
| 2020-08-22 | nvmm-x86-svm: dedup code | maxv |
| 2020-08-20 | nvmm-x86: improve the CPUID emulation | maxv |
| 2020-08-18 | nvmm-x86-svm: improve the CPUID emulation | maxv |
| 2020-08-18 | nvmm-x86: also flush the guest TLB when CR4.{PCIDE,SMEP} changes | maxv |
| 2020-08-05 | Add new field definitions, and intercept everything, for future-proofness. | maxv |
| 2020-08-05 | Use ULL, to make it clear we are unsigned. | maxv |
| 2020-07-19 | Switch to fpu_kern_enter/leave, to prevent clobbering, now that the kernel | maxv |
| 2020-07-19 | The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no | maxv |
| 2020-07-03 | Print the backend name when attaching. | maxv |
| 2020-05-24 | Gather the conditions to return from the VCPU loops in nvmm_return_needed(), | maxv |
| 2020-05-10 | Respect the convention for the hypervisor information: return the highest | maxv |
| 2020-05-09 | Improve the CPUID emulation of basic leaves: | maxv |
| 2020-04-30 | When the identification fails, print the reason. | maxv |
| 2020-03-22 | x86 pmap: | ad |
| 2020-03-14 | - Hide the details of SPCF_SHOULDYIELD and related behind a couple of small | ad |
| 2020-02-21 | Explicitly cast pointers to uintptr_t before casting to enums. They are | joerg |
| 2019-12-10 | pg->phys_addr > VM_PAGE_TO_PHYS(pg) | ad |
| 2019-11-20 | Hide XSAVES-specific stuff and the masked extended states. | maxv |
| 2019-10-28 | A few changes: | maxv |
| 2019-10-27 | Add a new VCPU conf option, that allows userland to request VMEXITs after a | maxv |
| 2019-10-23 | Miscellaneous changes in NVMM, to address several inconsistencies and | maxv |
| 2019-10-12 | Rewrite the FPU code on x86. This greatly simplifies the logic and removes | maxv |
| 2019-10-04 | Switch to the new PTE naming. | maxv |
| 2019-10-04 | Fix definition for MWAIT. It should be bit 11, not 12; 12 is the armed | maxv |
| 2019-10-04 | Add definitions for RDPRU, MCOMMIT, GMET and VTE. | maxv |
| 2019-05-11 | Rework the machine configuration interface. | maxv |
| 2019-05-01 | Use the comm page to inject events, rather than ioctls, and commit them in | maxv |
| 2019-04-29 | Stop taking care of the INT/NMI windows in the kernel, the emulator is | maxv |
| 2019-04-28 | Modify the communication layer between the kernel NVMM driver and libnvmm: | maxv |
| 2019-04-27 | Reorder the NVMM headers, to make a clear(er) distinction between MI and | maxv |
| 2019-04-27 | If guest events were being processed when a #VMEXIT occurred, reschedule | maxv |
| 2019-04-24 | Provide the hardware error code for NVMM_EXIT_INVALID, useful when | maxv |
| 2019-04-20 | Ah, take XSAVE into account in ECX too, not just in EBX. Otherwise if the | maxv |
| 2019-04-07 | Invert the filtering priority: now the kernel-managed cpuid leaves are | maxv |
| 2019-04-06 | Replace the misc[] state by a new compressed nvmm_x64_state_intr structure, | maxv |
| 2019-04-03 | Add MSR_TSC. | maxv |