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path: root/sys/dev/nvmm/x86/nvmm_x86_svm.c
AgeCommit message (Expand)Author
2023-02-23nvmm: Filter CR4 bits on x86 SVM (AMD).riastradh
2022-08-20x86: Split most of pmap.h into pmap_private.h or vmparam.h.riastradh
2021-03-26Implement nvmm_vcpu::stop, a race-free exit from nvmm_vcpu_run() withoutreinoud
2020-10-24Issue 64-bit versions of *XSAVE* for 64-bit amd64 programsmgorny
2020-09-08nvmm-x86: avoid hogging behavior observed recentlymaxv
2020-09-08nvmm: cosmetic changesmaxv
2020-09-06Fix fallout from previous uvm.h cleanup.riastradh
2020-09-05Round of uvm.h cleanup.riastradh
2020-09-05x86: rename PGEX_X -> PGEX_Imaxv
2020-09-05nvmm: update copyright headersmaxv
2020-09-04nvmm-x86-svm: check the SVM revisionmaxv
2020-08-26nvmm-x86-svm: improve the handling of MSR_EFERmaxv
2020-08-26nvmm-x86: improve the handling of RFLAGS.RFmaxv
2020-08-26nvmm-x86-svm: don't forget to intercept INVDmaxv
2020-08-22nvmm-x86-svm: dedup codemaxv
2020-08-20nvmm-x86: improve the CPUID emulationmaxv
2020-08-18nvmm-x86-svm: improve the CPUID emulationmaxv
2020-08-18nvmm-x86: also flush the guest TLB when CR4.{PCIDE,SMEP} changesmaxv
2020-08-05Add new field definitions, and intercept everything, for future-proofness.maxv
2020-08-05Use ULL, to make it clear we are unsigned.maxv
2020-07-19Switch to fpu_kern_enter/leave, to prevent clobbering, now that the kernelmaxv
2020-07-19The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has nomaxv
2020-07-03Print the backend name when attaching.maxv
2020-05-24Gather the conditions to return from the VCPU loops in nvmm_return_needed(),maxv
2020-05-10Respect the convention for the hypervisor information: return the highestmaxv
2020-05-09Improve the CPUID emulation of basic leaves:maxv
2020-04-30When the identification fails, print the reason.maxv
2020-03-22x86 pmap:ad
2020-03-14- Hide the details of SPCF_SHOULDYIELD and related behind a couple of smallad
2020-02-21Explicitly cast pointers to uintptr_t before casting to enums. They arejoerg
2019-12-10pg->phys_addr > VM_PAGE_TO_PHYS(pg)ad
2019-11-20Hide XSAVES-specific stuff and the masked extended states.maxv
2019-10-28A few changes:maxv
2019-10-27Add a new VCPU conf option, that allows userland to request VMEXITs after amaxv
2019-10-23Miscellaneous changes in NVMM, to address several inconsistencies andmaxv
2019-10-12Rewrite the FPU code on x86. This greatly simplifies the logic and removesmaxv
2019-10-04Switch to the new PTE naming.maxv
2019-10-04Fix definition for MWAIT. It should be bit 11, not 12; 12 is the armedmaxv
2019-10-04Add definitions for RDPRU, MCOMMIT, GMET and VTE.maxv
2019-05-11Rework the machine configuration interface.maxv
2019-05-01Use the comm page to inject events, rather than ioctls, and commit them inmaxv
2019-04-29Stop taking care of the INT/NMI windows in the kernel, the emulator ismaxv
2019-04-28Modify the communication layer between the kernel NVMM driver and libnvmm:maxv
2019-04-27Reorder the NVMM headers, to make a clear(er) distinction between MI andmaxv
2019-04-27If guest events were being processed when a #VMEXIT occurred, reschedulemaxv
2019-04-24Provide the hardware error code for NVMM_EXIT_INVALID, useful whenmaxv
2019-04-20Ah, take XSAVE into account in ECX too, not just in EBX. Otherwise if themaxv
2019-04-07Invert the filtering priority: now the kernel-managed cpuid leaves aremaxv
2019-04-06Replace the misc[] state by a new compressed nvmm_x64_state_intr structure,maxv
2019-04-03Add MSR_TSC.maxv