| Age | Commit message (Expand) | Author |
| 2020-08-05 | Simplify, remove unnecessary #ifdef DIAGNOSTIC around KASSERTs. | maxv |
| 2020-08-01 | Put the few x86-specific structures under #ifdef __x86_64__, for clarity. | maxv |
| 2020-07-19 | Switch to fpu_kern_enter/leave, to prevent clobbering, now that the kernel | maxv |
| 2020-07-19 | The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no | maxv |
| 2020-07-18 | Now that the IDT is per-CPU, it must be saved/restored on each CPU | maxv |
| 2020-07-14 | Introduce per-cpu IDTs | yamaguchi |
| 2020-07-03 | Print the backend name when attaching. | maxv |
| 2020-06-25 | Register NVMM as an actual pseudo-device. Without PMF handler, to | maxv |
| 2020-06-18 | style | maxv |
| 2020-05-24 | Gather the conditions to return from the VCPU loops in nvmm_return_needed(), | maxv |
| 2020-05-21 | Complete rev1.26: reset nvmm_impl to NULL in nvmm_fini(). | maxv |
| 2020-05-21 | Improve the CPUID emulation on nvmm-intel: limit the highest basic and | maxv |
| 2020-05-10 | Respect the convention for the hypervisor information: return the highest | maxv |
| 2020-05-09 | Improve the CPUID emulation of basic leaves: | maxv |
| 2020-05-09 | On Intel CPUs, CPUID leaf 0xB, too, provides topology information, so | maxv |
| 2020-04-30 | If we were processing a software int/excp, and got a VMEXIT in the middle, | maxv |
| 2020-04-30 | When the identification fails, print the reason. | maxv |
| 2020-04-26 | In nvmm_open(), make sure an implementation was found. This fixes an | maxv |
| 2020-03-22 | x86 pmap: | ad |
| 2020-03-14 | - Hide the details of SPCF_SHOULDYIELD and related behind a couple of small | ad |
| 2020-03-12 | vmx_vmptrst(): only used when DIAGNOSTIC | tnn |
| 2020-02-21 | Explicitly cast pointers to uintptr_t before casting to enums. They are | joerg |
| 2020-01-09 | Registering the host's CR0 is done outside of the VCPU loop, so it must be | maxv |
| 2020-01-09 | Mmh, as noted in PR/54847, this should be uint64_t, not uint16_t. Harmless | maxv |
| 2019-12-10 | pg->phys_addr > VM_PAGE_TO_PHYS(pg) | ad |
| 2019-11-20 | Hide XSAVES-specific stuff and the masked extended states. | maxv |
| 2019-11-16 | Don't report MWAITX by default. | maxv |
| 2019-10-28 | Add nram in struct nvmm_ctl_mach_info. | maxv |
| 2019-10-28 | A few changes: | maxv |
| 2019-10-27 | Change the way root_owner works: consider the calling process as root_owner | maxv |
| 2019-10-27 | Add PCID support in the guests. This speeds up most 64bit guests, because | maxv |
| 2019-10-27 | Mask CPUID leaf 0x0A on Intel, because we don't want the guest to try (and | maxv |
| 2019-10-27 | Add a new VCPU conf option, that allows userland to request VMEXITs after a | maxv |
| 2019-10-23 | Miscellaneous changes in NVMM, to address several inconsistencies and | maxv |
| 2019-10-12 | Rewrite the FPU code on x86. This greatly simplifies the logic and removes | maxv |
| 2019-10-04 | Switch to the new PTE naming. | maxv |
| 2019-10-04 | Fix definition for MWAIT. It should be bit 11, not 12; 12 is the armed | maxv |
| 2019-10-04 | Add definitions for RDPRU, MCOMMIT, GMET and VTE. | maxv |
| 2019-09-13 | Always set hwcode on error. Useful for debugging. | maxv |
| 2019-07-06 | Localify two functions that are no longer used outside. Also return the | maxv |
| 2019-06-16 | Make sure VMX-outside-SMX is allowed. It may not be if the BIOS decided to | maxv |
| 2019-05-18 | Now that SVS cannot be disabled at run time, MSR_LSTAR is static, so no | maxv |
| 2019-05-15 | NVMM: Expose MD_CLEAR to the guests. | maxv |
| 2019-05-11 | Rework the machine configuration interface. | maxv |
| 2019-05-01 | Use the comm page to inject events, rather than ioctls, and commit them in | maxv |
| 2019-04-29 | Stop taking care of the INT/NMI windows in the kernel, the emulator is | maxv |
| 2019-04-28 | Modify the communication layer between the kernel NVMM driver and libnvmm: | maxv |
| 2019-04-27 | Mmh, fix nvmm_vcpu_create(), the cpuid is given, and must not be chosen | maxv |
| 2019-04-27 | Reorder the NVMM headers, to make a clear(er) distinction between MI and | maxv |
| 2019-04-27 | If guest events were being processed when a #VMEXIT occurred, reschedule | maxv |